/**
 * \file    drv_hw_intf.c
 * \brief   DPM hardware interface
 *
 * \par     Copyright (c) 2018 UWE Technologies Corp., Ltd. All Rights Reserved.
 * \author  James
 * \date    2018-01-19
 * \version 
 * 
 * \history 
 *  Date        Note
 *  2018-01-19  Original Creation
 * 
 */

#include "types.h"
#include "drv_reg_intf.h"

/** Get register */
u32_t drv_reg_get(u32_t reg)
{
    return (*(volatile u32_t *)(reg));
}

/** Get multiple registers */
void drv_reg_mget(u32_t reg, u32_t cnt, u32_t *p_val)
{
    long i = (long)cnt;
    do
    {
        i--;
        *p_val++ = *(volatile u32_t *)(reg++);
    }
    while (i>0);
}

/** Set register */
void drv_reg_set(u32_t reg, u32_t val)
{
    *(volatile u32_t *)(reg) = val;
}

/** Set multiple registers */
void drv_reg_mset(u32_t reg, u32_t cnt, u32_t *p_val)
{
    long i = (long)cnt;
    do
    {
        i--;
        *(volatile u32_t *)(reg++) = *p_val++;
    }
    while (i>0);
}

/** Get register field with width */
u32_t drv_reg_field_get(u32_t reg, u32_t field, u32_t width)
{
	u32_t field_set = (0xFFFFFFFF >> (32 - width - field)) & (0xFFFFFFFF << field);
    return (((*(volatile u32_t *)(reg)) & field_set) >> field);
}

/** Set register field with width */
void drv_reg_field_set(u32_t reg, u32_t field, u32_t width, u32_t val)
{
    u32_t field_set = (0xFFFFFFFF >> (32 - width - field)) & (0xFFFFFFFF << field);
    *(volatile u32_t *)(reg) = ((*(volatile u32_t *)(reg)) & (~field_set)) | ((val << field) & field_set);
}

u32_t drv_reg_field_get2(u32_t reg, u32_t field, u32_t fldset)
{
    return ((*(volatile u32_t *)(reg)) & fldset) >> field;
}

void drv_reg_field_set2(u32_t reg, u32_t field, u32_t field_set, u32_t field_mask, u32_t val)
{
    *(volatile u32_t *)(reg) = ((*(volatile u32_t *)(reg)) & field_mask) | ((val << field) & field_set);
}

