/**
 * \file    sys_reg.h
 * \brief   System control register definitions header file
 *
 * \par     Copyright (c) 2020 UWE Technologies Corp., Ltd. All Rights Reserved.
 * \author  James
 * \date    2020-03-27
 * \version
 *
 * \history
 *  Date        Note
 *  2020-03-27  Original Creation
 *
 */

#ifndef __SYS_REG_H_
#define __SYS_REG_H_

#ifdef __cplusplus
extern "C" {
#endif

#include "types.h"

/** System control register definitions */
#define SYS_VERSION_REG                 (0x00)
#define SYS_CONTROL_0_REG               (0x01)
#define SYS_SRC_PWR_PROFILE_REG         (0x02)
#define SYS_SNK_PWR_PROFILE_REG         (0x03)
#define SYS_BATTERY_CAP_REG             (0x04)
#define SYS_EVENT_0_REG                 (0x05)
#define SYS_EVENT_1_REG                 (0x06)
#define SYS_CONTROL_1_REG               (0x07)
#define SYS_OPERATING_PWR_REG           (0x08)
#define SYS_NTC_VAL_0_REG               (0x09)
#define SYS_NTC_VAL_1_REG               (0x0A)

#define SYS_TYPE_C_CTRL_REG             (0x10)
#define SYS_PD_CTRL_REG                 (0x11)
#define SYS_QC_CTRL_REG                 (0x12)
#define SYS_ADV_CTRL_0_REG              (0x13)
#define SYS_ADV_CTRL_1_REG              (0x14)
#define SYS_PDO_CTRL_REG                (0x15)
#define SYS_PDO_BYTE_0_REG              (0x16)
#define SYS_PDO_BYTE_1_REG              (0x17)
#define SYS_PDO_BYTE_2_REG              (0x18)
#define SYS_PDO_BYTE_3_REG              (0x19)

#define SYS_TYPE_C_STATUS_0_REG         (0x20)      
#define SYS_PD_STATUS_REG               (0x21)
#define SYS_QC_STATUS_REG               (0x22)
#define SYS_TYPE_C_STATUS_1_REG         (0x23)
#define SYS_PE_STATUS_REG               (0x24)
#define SYS_VBUS_VAL_0_REG              (0x27)
#define SYS_VBUS_VAL_1_REG              (0x28)
#define SYS_IBUS_VAL_0_REG              (0x25)
#define SYS_IBUS_VAL_1_REG              (0x26)

#define SYS_CHIP_REG_CTRL_REG           (0x40)
#define SYS_CHIP_REG_ADDR_0_REG         (0x41)
#define SYS_CHIP_REG_ADDR_1_REG         (0x42)
#define SYS_CHIP_REG_ADDR_2_REG         (0x43)
#define SYS_CHIP_REG_ADDR_3_REG         (0x44)
#define SYS_CHIP_REG_VAL_0_REG          (0x45)
#define SYS_CHIP_REG_VAL_1_REG          (0x46)
#define SYS_CHIP_REG_VAL_2_REG          (0x47)
#define SYS_CHIP_REG_VAL_3_REG          (0x48)
#define SYS_CHIP_ADC_CTRL_REG           (0x49)
#define SYS_CHIP_ADC_VAL_0_REG          (0x4A)
#define SYS_CHIP_ADC_VAL_1_REG          (0x4B)
#define SYS_LED_BITMAP                  (0x80)
#define SYS_LED_DUTY_SET_REG            (0X81)
#define SYS_BAT_STA_VAL_0_REG           (0x82)
#define SYS_BAT_STA_VAL_1_REG           (0x83)
#define SYS_BAT_BMS_TEMPVAL_0_REG       (0x84)
#define SYS_BAT_BMS_TEMPVAL_1_REG       (0x85)
#define SYS_BAT_BMS_TEMPVAL_2_REG       (0x86)
#define SYS_BAT_BMS_TEMPVAL_3_REG       (0x87)
#define SYS_MASTER_CHARGE_PWR_REG       (0X88)
#define SYS_IBAT_VAL_0_REG              (0x89)
#define SYS_IBAT_VAL_1_REG              (0x8A)

#define SYS_BMS_CTRL_REG                (0x8B)
#define SYS_IBT_LIMIT_REG               (0x8C)
#define SYS_GET_LED_STATE_REG           (0x8D)

#define SYS_REQUEST_POWER_REG           (0x90)
#define SYS_USBA_STA_REG                (0x91)
#define SYS_USBA1_CURRENT_REG           (0x92)
#define SYS_USBA1_QC_STA_REG            (0X93)

#define SYS_SLA_DEV_ID                  (0x28)
#define SYS_SLA_VERSION                 (0x01)

#pragma pack(1)


/** Single register operation header structure definition */
typedef struct SYS_REG_HEAD_s
{
    unsigned char read:1,                   /* Read operation flag */
                  cont_opr:1,               /* Continuous operation flag */
                  dev_id:6;                 /* Slave Device ID */
    unsigned char reg_addr;                 /* Register Address */
} SYS_REG_HEAD_t;

/** Multiple registers operation header structure definition */
typedef struct SYS_MREG_HEAD_s
{
    unsigned char read:1,                   /* Read operation flag */
                  cont_opr:1,               /* Continuous operation flag */
                  dev_id:6;                 /* Slave Device ID */
    unsigned char num;                      /* Register Number */
    unsigned char reg_start_addr;           /* Register Start Address */
} SYS_MREG_HEAD_t;


/** Slave device ID structure definition */
typedef struct SYS_REG_SLA_DEV_ID_s
{
    unsigned char read:1,                   /* Read operation flag */
                  cont_opr:1,               /* Continuous operation flag */
                  dev_id:6;                 /* Slave Device ID */
} SYS_REG_SLA_DEV_ID_t;


/** System Control 0 Register */
typedef struct SYS_CONTROL_0_REG_s
{
    unsigned char shutdown:1,               /* System shutdown flag */
                  reset:1,                  /* Reset flag */
                  dead_battery:1,           /* Dead battery flag */
                  low_current_mode:1,       /* Low current mode flag */
                  idle:1,                   /* IDLE flag */
                  ocp:1,                    /* OCP flag */
                  pr:1,                    /* pr flag */
                  charge:1;                 /* Charge flag */
} SYS_CONTROL_0_REG_t;

/** System Event 0 Register */
typedef struct SYS_EVENT_0_REG_s
{
    unsigned char operation_failure:1,      /* Operation failure flag */
                  i2c_comm_failure:1,       /* I2C communicaton failure flag */
                  reserved:6;               /* Reserved */
} SYS_EVENT_0_REG_t;

/** System Event 1 Register */
typedef struct SYS_EVENT_1_REG_s
{
    unsigned char cc_changed:1,             /* CC changed flag */
                  pd_changed:1,             /* PD changed flag */
                  usba1_en:1,               /*usba1 mos en*/
                  usba2_en:1,               /*usba2 mos en*/
                  usba1_off:1,              /*usba1 mos off*/
                  usba2_off:1,              /*usba2 mos off*/
                  reserved:2;               /* Reserved */
} SYS_EVENT_1_REG_t;


/** System Control 1 Register */
typedef struct SYS_CONTROL_1_REG_s
{
    unsigned char cfg_save:1,               /* Save configuration */
                  cfg_erase:1,              /* Erase configuration */
                  discharge_off:1,          /* shut down discharge */
                  pr_src_mode:1,            /*set c2 to src only */
                  reserved:4;               /* Reserved */
} SYS_CONTROL_1_REG_t;


/** System Type-C Control Register */
typedef struct SYS_TYPE_C_CTRL_REG_s
{
    unsigned char pr_role:2,                /* Power Role: SNK:0,SRC:1,DRP:2 */
                  dr_role:2,                /* Data Role: UFP:0,DFP:1,DRD:2 */
                  vbus_check:1,             /* VBUS Checking Enabled */
                  vconn:1,                  /* VCONN Enabled */
                  try_src:1,                /* Try.SRC Enabled */
                  en:1;                     /* Type-C Enabled */
} SYS_TYPE_C_CTRL_REG_t;

/** System PD Control Register */
typedef struct SYS_PD_CTRL_REG_s
{
    unsigned char test_mode:1,              /* Test Mode */
                  capture_mode:1,           /* Capture Mode */
                  vdm:1,                    /* VDM Enabled */
                  vdm_src_startup:1,        /* VDM Source Startup Enabled */
                  vdm_modal:1,              /* VDM Modal Enabled */
                  reserved:1,               /* Reserved */
                  rev:1,                    /* Revision, R2:0, R3:1 */
                  en:1;                     /* PD Enabled */
} SYS_PD_CTRL_REG_t;

/** System QC Control Register */
typedef struct SYS_QC_CTRL_REG_s
{
    unsigned char reserved:5,               /* Reserved */
                  version:2,                /* Version, V2:0, V3:1, V4:2  */
                  en:1;                     /* QC Enabled */
} SYS_QC_CTRL_REG_t;

/** System Advanced Control 0 Register */
typedef struct SYS_ADV_CTRL_0_REG_s
{
    unsigned char cc1_dis:1,                /* CC1 Disabled */
                  cc2_dis:1,                /* CC2 Disabled */
                  err_recovery:1,           /* Error Recovery */
                  prs_req:1,                /* Power Role Swap Request */
                  drs_req:1,                /* Data Role Swap Request */
                  vcs_req:1,                /* VCONN Swap Request */
                  soft_reset:1,             /* Soft Reset */
                  hard_reset:1;             /* Hard Reset */
} SYS_ADV_CTRL_0_REG_t;

/** System Advanced Control 1 Register */
typedef struct SYS_ADV_CTRL_1_REG_s
{
    unsigned char get_src_cap:1,            /* Get Source Capability Request */
                  get_snk_cap:1,            /* Get Sink Capability Request */
                  goto_min:1,               /* Goto min Request */
                  new_power_level:1,        /* New Power Level Request */
                  reserved:4;               /* Reserved */
} SYS_ADV_CTRL_1_REG_t;


/** System PDO Control Register */
typedef struct SYS_PDO_CTRL_REG_s
{
    unsigned char pdo_pos:3,                /* Power Data Object Position */
                  pdo_clear:1,              /* Clear Power Data Object */
                  pdo_set:1,                /* Set Power Data Object */
                  pdo_apply:1,              /* Apply All Configured Power Data Object */
                  pdo_get:1,                /* Get Power Data Object */
                  rdo_get:1;                /* Get Request Data Object */
} SYS_PDO_CTRL_REG_t;


/** System Type-C Status 0 Register */
typedef struct SYS_TYPE_C_STATUS_0_REG_s
{
    unsigned char conn:1,                   /* Type-C Connection: 0:Disconnected,1:Connected */
                  pr_mode:1,                /* Power Mode: SNK:0,SRC:1 */
                  dr_mode:1,                /* Data Mode: UFP:0,DFP:1 */
                  ra_detected:1,            /* Ra detected */
                  vconn_sourcing:1,         /* VCONN Sourcing */
                  cc_orient:1,              /* CC Orientation, 0:CC1, 1:CC2 */
                  charging:1,               /* Charging Flag: FALSE:0, TRUE:1 */
                  ocp:1;                    /* Source Over Current Protection: FALSE:0, TRUE:1 */
} SYS_TYPE_C_STATUS_0_REG_t;

/** System PD Status Register */
typedef struct SYS_PD_STATUS_REG_s
{
    unsigned char conn:1,                   /* PD Connection: 0:Disconnected,1:Connected */
                  power_nego_completed:1,   /* Power Negotiation Completed */
                  pdo_pos:3,                /* Power Data Object Position */
                  reserved:3;               /* Reserved */
} SYS_PD_STATUS_REG_t;

/** System QC Status Register */
typedef struct SYS_QC_STATUS_REG_s
{
   unsigned char usba1_qc_en:1,                   
                 usba2_qc_en:1,
                 usba1_indet:1,
                 usba2_indet:1,
                 usba1_nocurr:1,                   
                 usba2_nocurr:1,
                 usba1_nocurr_tick_en:1,
                 usba2_nocurr_tick_en:1;
} SYS_QC_STATUS_REG_t;

/** System Type-C Status 1 Register */
typedef struct SYS_TYPE_C_STATUS_REG_s
{
    unsigned char cc_state:4,               /* CC State */
                  cc_prev_state:4;          /* CC Previous State */
} SYS_TYPE_C_STATUS_REG_t;


/** System Chip Register Control Register */



typedef enum SYS_REG_e
{
    SYS_PDO_INFO_REG = 0x00,
    SYS_VBUS_HI_REG  = 0x01,
    SYS_VBUS_LO_REG  = 0x02,
    SYS_IBUS_HI_REG  = 0x03,
    SYS_IBUS_LO_REG  = 0x04,
    SYS_MCU_CTRL_REG = 0x05,
    SYS_REG_MAX_NUM
} SYS_REG_t;



/** System Chip ADC Reading Register */

typedef struct SYS_CHIP_REG_CTRL_REG_s
{
    unsigned char write:1,                  /* Write Flag */
                  read:1,                   /* Read Flag */
                  reserved:6;               /* Reserved */
} SYS_CHIP_REG_CTRL_REG_t;


/** System Chip ADC Reading Register */

/** System STA  Register */
typedef struct SYS_POWER_STA_REG_s
{
    unsigned char dc_charg:1,               /* dc charge flag */
                  charg_full:1,             /* charge full flag */
                  reserved:5;              /* reserved */
} SYS_POWER_STA_REG_t;

typedef struct SYS_UPD_STA_REG_s
{
    unsigned char reserved:4,              /* reserved */
                  connect:1,               /* connect */
                  ocp:1,                   /* over current or volt */
                  deadbattery:1,           /*deadbattery*/
                  charge:1;                /*charge flag*/
} SYS_UPD_STA_REG_t;

typedef struct SYS_MCU_CTR_REG_s
{
    unsigned char reserved:6,              /* reserved */
                  offdischarge:1,          /* off discharge function */
                  offcharge:1;            /* off charge function */
} SYS_MCU_CTR_REG_t;



typedef struct SYS_CHIP_ADC_CTRL_REG_s
{
    unsigned char channel:4,                /* ADC channel */
                  stc:3,                    /* Sample Time Control */
                  stc_en:1;                 /* Sample Time Control Enabled */
} SYS_CHIP_ADC_CTRL_REG_t;

/** System bms ctrl Register */
typedef struct SYS_BMS_CTRL_REG_s
{
    unsigned char shutdown_mode:1,                /* bms shutdown mode */
                  reserved:7;                    /* Reserved */                                               
} SYS_BMS_CTRL_REG_t;

/** System Usba Sta Register */
typedef struct SYS_USBA_STA_REG_s
{
    unsigned char usba1_in:1,                /* usba1 indet */
                  usba2_in:1,               /* usba2 indet */
                  usba1_en:1,               /*usba1 mos en */
                  usba2_en:1,               /*usba2 mos en*/
				  lcddisplay_en:1,
				                    resv:3;                 /* Sample Time Control Enabled */
} SYS_USBA_STA_REG_t;
#pragma pack()

bool_t sys_version_reg_get(unsigned char *p_val);
bool_t sys_control_0_reg_get(unsigned char *p_val);
bool_t sys_control_0_reg_set(unsigned char *p_val);
bool_t sys_src_pwr_profile_reg_get(unsigned char *p_val);
bool_t sys_src_pwr_profile_reg_set(unsigned char *p_val);
bool_t sys_snk_pwr_profile_reg_get(unsigned char *p_val);
bool_t sys_snk_pwr_profile_reg_set(unsigned char *p_val);
bool_t sys_battery_cap_reg_get(unsigned char *p_val);
bool_t sys_battery_cap_reg_set(unsigned char *p_val);
bool_t sys_event_0_reg_get(unsigned char *p_val);
bool_t sys_event_0_reg_set(unsigned char *p_val);
bool_t sys_event_1_reg_get(unsigned char *p_val);
bool_t sys_event_1_reg_set(unsigned char *p_val);
bool_t sys_control_1_reg_get(unsigned char *p_val);
bool_t sys_control_1_reg_set(unsigned char *p_val);
bool_t sys_operating_pwr_reg_get(unsigned char *p_val);
bool_t sys_ntc_val_0_reg_get(unsigned char *p_val);
bool_t sys_ntc_val_1_reg_get(unsigned char *p_val);
bool_t sys_ntc_val_0_reg_set(unsigned char *p_val);
bool_t sys_ntc_val_1_reg_set(unsigned char *p_val);

bool_t sys_type_c_ctrl_reg_get(unsigned char *p_val);
bool_t sys_type_c_ctrl_reg_set(unsigned char *p_val);
bool_t sys_pd_ctrl_reg_get(unsigned char *p_val);
bool_t sys_pd_ctrl_reg_set(unsigned char *p_val);
bool_t sys_qc_ctrl_reg_get(unsigned char *p_val);
bool_t sys_qc_ctrl_reg_set(unsigned char *p_val);
bool_t sys_adv_ctrl_0_reg_get(unsigned char *p_val);
bool_t sys_adv_ctrl_0_reg_set(unsigned char *p_val);
bool_t sys_adv_ctrl_1_reg_get(unsigned char *p_val);
bool_t sys_adv_ctrl_1_reg_set(unsigned char *p_val);
bool_t sys_pdo_ctrl_reg_get(unsigned char *p_val);
bool_t sys_pdo_ctrl_reg_set(unsigned char *p_val);
bool_t sys_pdo_byte_0_reg_get(unsigned char *p_val);
bool_t sys_pdo_byte_0_reg_set(unsigned char *p_val);
bool_t sys_pdo_byte_1_reg_get(unsigned char *p_val);
bool_t sys_pdo_byte_1_reg_set(unsigned char *p_val);
bool_t sys_pdo_byte_2_reg_get(unsigned char *p_val);
bool_t sys_pdo_byte_2_reg_set(unsigned char *p_val);
bool_t sys_pdo_byte_3_reg_get(unsigned char *p_val);
bool_t sys_pdo_byte_3_reg_set(unsigned char *p_val);

bool_t sys_type_c_status_0_reg_get(unsigned char *p_val);
bool_t sys_pd_status_reg_get(unsigned char *p_val);
bool_t sys_qc_status_reg_get(unsigned char *p_val);
bool_t sys_type_c_status_1_reg_get(unsigned char *p_val);
bool_t sys_pe_status_reg_get(unsigned char *p_val);
bool_t sys_vbus_val_0_reg_get(unsigned char *p_val);
bool_t sys_vbus_val_1_reg_get(unsigned char *p_val);
bool_t sys_ibus_val_0_reg_get(unsigned char *p_val);
bool_t sys_ibus_val_1_reg_get(unsigned char *p_val);

bool_t sys_chip_reg_ctrl_reg_get(unsigned char *p_val);
bool_t sys_chip_reg_addr_0_reg_get(unsigned char *p_val);
bool_t sys_chip_reg_addr_1_reg_get(unsigned char *p_val);
bool_t sys_chip_reg_addr_2_reg_get(unsigned char *p_val);
bool_t sys_chip_reg_addr_3_reg_get(unsigned char *p_val);
bool_t sys_chip_reg_val_0_reg_get(unsigned char *p_val);
bool_t sys_chip_reg_val_1_reg_get(unsigned char *p_val);
bool_t sys_chip_reg_val_2_reg_get(unsigned char *p_val);
bool_t sys_chip_reg_val_3_reg_get(unsigned char *p_val);

bool_t sys_chip_reg_ctrl_reg_set(unsigned char *p_val);
bool_t sys_chip_reg_addr_0_reg_set(unsigned char *p_val);
bool_t sys_chip_reg_addr_1_reg_set(unsigned char *p_val);
bool_t sys_chip_reg_addr_2_reg_set(unsigned char *p_val);
bool_t sys_chip_reg_addr_3_reg_set(unsigned char *p_val);
bool_t sys_chip_reg_val_0_reg_set(unsigned char *p_val);
bool_t sys_chip_reg_val_1_reg_set(unsigned char *p_val);
bool_t sys_chip_reg_val_2_reg_set(unsigned char *p_val);
bool_t sys_chip_reg_val_3_reg_set(unsigned char *p_val);

bool_t sys_chip_adc_ctrl_reg_get(unsigned char *p_val);
bool_t sys_chip_adc_ctrl_reg_set(unsigned char *p_val);
bool_t sys_chip_adc_val_0_reg_get(unsigned char *p_val);
bool_t sys_chip_adc_val_1_reg_get(unsigned char *p_val);

bool_t sys_reg_read(unsigned char reg, unsigned char *p_val);
bool_t sys_reg_write(unsigned char reg, unsigned char *p_val);
bool_t sys_led_bit_map_reg_set(unsigned char *p_val);
bool_t sys_led_pwmduty_reg_set(unsigned char *p_val);
bool_t sys_bat_sta_val_0_reg_get(unsigned char *p_val);
bool_t sys_bat_sta_val_1_reg_get(unsigned char *p_val);
bool_t sys_bms_temp_val_0_reg_get(unsigned char *p_val);
bool_t sys_bms_temp_val_1_reg_get(unsigned char *p_val);
bool_t sys_bms_temp_val_2_reg_get(unsigned char *p_val);
bool_t sys_bms_temp_val_3_reg_get(unsigned char *p_val);
bool_t sla_master_charge_pwr_reg_set(unsigned char *p_val);
bool_t sys_ibat_val_0_reg_get(unsigned char *p_val);
bool_t sys_ibat_val_1_reg_get(unsigned char *p_val);
bool_t sys_bms_ctrl_reg_set(unsigned char *p_val);
bool_t sys_ibat_level_reg_set(unsigned char *p_val);
bool_t sys_master_led_state_get(unsigned char *p_val);

bool_t sys_request_pwr_reg_get(unsigned char *p_val);



#ifdef __cplusplus
}
#endif

#endif /* #ifndef __SYS_REG_H_ */

