/**
 * \file    sc8014_reg_defs.h
 * \brief   register definitions for SC8812A
 * 
 * \par     Copyright (c) 2020 UWE Technologies Corp., Ltd. All Rights Reserved.
 * \author  James
 * \date    2020-03-26
 * \version 
 * 
 * \history 
 *  Date        Note
 *  2020-03-26  Original Creation
 * 
 */

#ifndef __SC8014_REG_DEFS_H_
#define __SC8014_REG_DEFS_H_


/** \name  Register access type definition
 * \{ 
 */
#define RO      (0) ///< Read only
#define RC      (1) ///< Read and clear
#define RW      (2) ///< Read and write
#define WC      (3) ///< Write and clear
/** \} */


#define SYS_BAT_BASE_ADDR                                (0xE8)


#define VOUTREF_I_SET_REG                               (0x01)

/**
VOUTREF_I_SET, RW, reset value(0x31)
Reference voltage programming for internal VOUT voltage setting.
When FB_SEL = 0 (internal VOUT setting), set the highest 8-bit of the reference voltage for VOUT (total 10-bit programming).
The internal reference voltage is calculated as VOUTREF_I = (4 x VOUTREF_I_SET + VOUTREF_I_SET2 + 1) x 2 mV
The VOUT output voltage is calculated as VOUT = VOUTREF_I x VOUT_RATIO
VOUTREF_I_SET range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
….
0011 0001: 49 (default)
….
1111 1111: 255
The default reference voltage is (4 x 49 +3+1) x 2 mV = 400 mV; the default VOUT output voltage with FB_SEL = 0 is 400mV x 12.5 = 5V
*/
#ifndef VOUTREF_I_SET
#define VOUTREF_I_SET
#endif
#define VOUTREF_I_SET_REG_VOUTREF_I_SET                 (0x00)
#define VOUTREF_I_SET_REG_VOUTREF_I_SET_WTH             (0x08)
#define VOUTREF_I_SET_REG_VOUTREF_I_SET_FLDSET          (0xFF)
#define VOUTREF_I_SET_REG_VOUTREF_I_SET_FLDMSK          (0x00)
#define VOUTREF_I_SET_REG_VOUTREF_I_SET_ACCESS          RW

#define VOUTREF_I_SET_REG_ACCESS                        RW
#define VOUTREF_I_SET_REG_FIELD_COUNT                   (1)


#define VOUTREF_I_SET2_REG                              (0x02)

/**
VOUTREF_I_SET2, RW, reset value(0x3)
Reference voltage programming for internal VOUT voltage setting.
When FB_SEL = 0 (internal VOUT setting), set the lowest 2-bit of the reference voltage for VOUT (total 10-bit programming).
The internal reference voltage is calculated as VOUTREF_I = (4 x VOUTREF_I_SET + VOUTREF_I_SET2 + 1) x 2 mV
The VOUT output voltage is calculated as VOUT = VOUTREF_I x VOUT_RATIO
VOUTREF_I_SET2 range: 0 ~ 3
00: 0
01: 1
10: 2
11: 3 (default)
*/
#ifndef VOUTREF_I_SET2
#define VOUTREF_I_SET2
#endif
#define VOUTREF_I_SET2_REG_VOUTREF_I_SET2               (0x06)
#define VOUTREF_I_SET2_REG_VOUTREF_I_SET2_WTH           (0x02)
#define VOUTREF_I_SET2_REG_VOUTREF_I_SET2_FLDSET        (0xC0)
#define VOUTREF_I_SET2_REG_VOUTREF_I_SET2_FLDMSK        (0x3F)
#define VOUTREF_I_SET2_REG_VOUTREF_I_SET2_ACCESS        RW

#define VOUTREF_I_SET2_REG_ACCESS                       RW
#define VOUTREF_I_SET2_REG_FIELD_COUNT                  (2)


#define VOUTREF_E_SET_REG                               (0x03)

/**
VOUTREF_E_SET, RW, reset value(0x7C)
Reference voltage programming for external VOUT voltage setting.
When FB_SEL = 1 (external VOUT setting), set the highest 8-bit of the reference voltage for VOUT (total 10-bit programming).
The external reference voltage is calculated as VOUTREF_E = (4 x VOUTREF_E_SET+VOUTREF_E_SET2+1) x 2mV
The VOUT output voltage is calculated as VOUT = VOUTREF_E x (1+RUP/RDOWM)
VOUTREF_E_SET range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
….
0111 1100: 124 (default)
….
1111 1111: 255
The default reference voltage is (4 x 124 +3 +1) x 2 mV = 1 V
*/
#ifndef VOUTREF_E_SET
#define VOUTREF_E_SET
#endif
#define VOUTREF_E_SET_REG_VOUTREF_E_SET                 (0x00)
#define VOUTREF_E_SET_REG_VOUTREF_E_SET_WTH             (0x08)
#define VOUTREF_E_SET_REG_VOUTREF_E_SET_FLDSET          (0xFF)
#define VOUTREF_E_SET_REG_VOUTREF_E_SET_FLDMSK          (0x00)
#define VOUTREF_E_SET_REG_VOUTREF_E_SET_ACCESS          RW

#define VOUTREF_E_SET_REG_ACCESS                        RW
#define VOUTREF_E_SET_REG_FIELD_COUNT                   (1)


#define VOUTREF_E_SET2_REG                              (0x04)

/**
VOUTREF_E_SET2, RW, reset value(0x3)
Reference voltage programming for external VOUT voltage setting.
When FB_SEL = 1 (external VOUT setting), set the lowest 2-bit of the reference voltage for VOUT (total 10-bit programming).
The external reference voltage is calculated as VOUTREF_E = (4 x VOUTREF_E_SET+VOUTREF_E_SET2+1) x 2mV
The VOUT output voltage is calculated as VOUT = VOUTREF_E x (1+RUP/RDOWM)
VOUTREF_E_SET2 range: 0 ~ 3
00: 0
01: 1
10: 2
11: 3 (default)
*/
#ifndef VOUTREF_E_SET2
#define VOUTREF_E_SET2
#endif
#define VOUTREF_E_SET2_REG_VOUTREF_E_SET2               (0x06)
#define VOUTREF_E_SET2_REG_VOUTREF_E_SET2_WTH           (0x02)
#define VOUTREF_E_SET2_REG_VOUTREF_E_SET2_FLDSET        (0xC0)
#define VOUTREF_E_SET2_REG_VOUTREF_E_SET2_FLDMSK        (0x3F)
#define VOUTREF_E_SET2_REG_VOUTREF_E_SET2_ACCESS        RW

#define VOUTREF_E_SET2_REG_ACCESS                       RW
#define VOUTREF_E_SET2_REG_FIELD_COUNT                  (2)


#define IOUT_LIM_SET_REG                                (0x05)

/**
IOUT_LIM_SET, RW, reset value(0xFF)
Set IOUT current limit, which is valid for both charging and discharging modes. IOUT_LIM (A) = (IOUT_LIM_SET +1)/256 × IOUT_RATIO ×10 mΩ/RS1
RS1 is the current sense resistor at VOUT side.
IOUT_LIM_SET range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
…
1111 1111: 255 (default)
E.g., if RS1 = 10 mΩ, the default IOUT current limit is
(255+1)/256 x 3 x 10 mΩ / 10 mΩ = 3 A
*/
#ifndef IOUT_LIM_SET
#define IOUT_LIM_SET
#endif
#define IOUT_LIM_SET_REG_IOUT_LIM_SET                   (0x00)
#define IOUT_LIM_SET_REG_IOUT_LIM_SET_WTH               (0x08)
#define IOUT_LIM_SET_REG_IOUT_LIM_SET_FLDSET            (0xFF)
#define IOUT_LIM_SET_REG_IOUT_LIM_SET_FLDMSK            (0x00)
#define IOUT_LIM_SET_REG_IOUT_LIM_SET_ACCESS            RW

#define IOUT_LIM_SET_REG_ACCESS                         RW
#define IOUT_LIM_SET_REG_FIELD_COUNT                    (1)


#define IIN_LIM_SET_REG                                (0x06)

/**
IIN_LIM_SET, RW, reset value(0xFF)
Set IIN current limit, which is valid for both charging and discharging modes. IIN_LIM (A) = (IIN_LIM_SET+1)/256 × IIN_RATIO ×10 mΩ/RS2
RS2 is the current sense resistor at VIN side.
IIN_LIM_SET range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
…
1111 1111: 255 (default)
E.g., if RS2 = 10 mΩ, the default IIN current limit is
(255+1)/256 x 12 x 10 mΩ / 10 mΩ = 12 A
*/
#ifndef IIN_LIM_SET
#define IIN_LIM_SET
#endif
#define IIN_LIM_SET_REG_IIN_LIM_SET                   (0x00)
#define IIN_LIM_SET_REG_IIN_LIM_SET_WTH               (0x08)
#define IIN_LIM_SET_REG_IIN_LIM_SET_FLDSET            (0xFF)
#define IIN_LIM_SET_REG_IIN_LIM_SET_FLDMSK            (0x00)
#define IIN_LIM_SET_REG_IIN_LIM_SET_ACCESS            RW

#define IIN_LIM_SET_REG_ACCESS                         RW
#define IIN_LIM_SET_REG_FIELD_COUNT                    (1)


#define RATIO_REG                                       (0x08)


/**
IIN_RATIO, RW, reset value(0x0)
IIN_LIM setting ratio
0: 6x
1: 12x (default)
*/
#ifndef IIN_RATIO
#define IIN_RATIO
#endif
#define RATIO_REG_IIN_RATIO                            (0x04)
#define RATIO_REG_IIN_RATIO_WTH                        (0x01)
#define RATIO_REG_IIN_RATIO_FLDSET                     (0x10)
#define RATIO_REG_IIN_RATIO_FLDMSK                     (0xEF)
#define RATIO_REG_IIN_RATIO_ACCESS                     RW

/**
IOUT_RATIO, RW, reset value(0x2)
IOUT_LIM setting ratio
00: not allowed
01: 6x
10: 3x (default)
11: not allowed
*/
#ifndef IOUT_RATIO
#define IOUT_RATIO
#endif
#define RATIO_REG_IOUT_RATIO                            (0x02)
#define RATIO_REG_IOUT_RATIO_WTH                        (0x02)
#define RATIO_REG_IOUT_RATIO_FLDSET                     (0x0C)
#define RATIO_REG_IOUT_RATIO_FLDMSK                     (0xF3)
#define RATIO_REG_IOUT_RATIO_ACCESS                     RW

/**
VIN_MON_RATIO, RW, reset value(0x0)
Ratio setting for VIN voltage monitor
0: 12.5x (default)
1: 5x
The battery voltage is monitored through ADC and can be calculated as below:
VIN = (4 x VIN_FB_VALUE + VIN_FB_VALUE2 + 1) x VIN_MON_RATIO x 2 mV
VIN_FB_VALUE and VIN_FB_VALUE2 are ADC register values.
For 1S and 2S battery applications (VIN < 9V), set this bit to 1.
*/
#ifndef VIN_MON_RATIO
#define VIN_MON_RATIO
#endif
#define RATIO_REG_VIN_MON_RATIO                        (0x01)
#define RATIO_REG_VIN_MON_RATIO_WTH                    (0x01)
#define RATIO_REG_VIN_MON_RATIO_FLDSET                 (0x02)
#define RATIO_REG_VIN_MON_RATIO_FLDMSK                 (0xFD)
#define RATIO_REG_VIN_MON_RATIO_ACCESS                 RW

/**
VOUT_RATIO, RW, reset value(0x0)
Set the ratio for VOUT voltage setting and VOUT voltage monitor.
0: 12.5x (default)
1: 5x
*/
#ifndef VOUT_RATIO
#define VOUT_RATIO
#endif
#define RATIO_REG_VOUT_RATIO                            (0x00)
#define RATIO_REG_VOUT_RATIO_WTH                        (0x01)
#define RATIO_REG_VOUT_RATIO_FLDSET                     (0x01)
#define RATIO_REG_VOUT_RATIO_FLDMSK                     (0xFE)
#define RATIO_REG_VOUT_RATIO_ACCESS                     RW

#define RATIO_REG_ACCESS                                RW
#define RATIO_REG_FIELD_COUNT                           (6)


#define CTRL0_SET_REG                                   (0x09)

/**
FREQ_SET, RW, reset value(0x1)
Switching frequency setting
00: 150kHz
01: 300kHz (default)
10: Reserved
11: 450kHz
*/
#ifndef FREQ_SET
#define FREQ_SET
#endif
#define CTRL0_SET_REG_FREQ_SET                          (0x02)
#define CTRL0_SET_REG_FREQ_SET_WTH                      (0x02)
#define CTRL0_SET_REG_FREQ_SET_FLDSET                   (0x0C)
#define CTRL0_SET_REG_FREQ_SET_FLDMSK                   (0xF3)
#define CTRL0_SET_REG_FREQ_SET_ACCESS                   RW

/**
DT_SET, RW, reset value(0x0)
Switching dead time setting
00: 20ns (default)
01: 40ns
10: 60ns
11: 80ns
*/
#ifndef DT_SET
#define DT_SET
#endif
#define CTRL0_SET_REG_DT_SET                            (0x00)
#define CTRL0_SET_REG_DT_SET_WTH                        (0x02)
#define CTRL0_SET_REG_DT_SET_FLDSET                     (0x03)
#define CTRL0_SET_REG_DT_SET_FLDMSK                     (0xFC)
#define CTRL0_SET_REG_DT_SET_ACCESS                     RW

#define CTRL0_SET_REG_ACCESS                            RW
#define CTRL0_SET_REG_FIELD_COUNT                       (6)


#define CTRL1_SET_REG                                   (0x0A)

/**
FB_SEL, RW, reset value(0x0)
VOUT voltage setting control, only for discharging mode
0: internal VOUT setting, VOUT output voltage is set by VOUT_RATIO bit and VOUTREF_I_SET bits (default)
1: external VOUT setting, VOUT output voltage is set by resistor divider at FB pin
*/
#ifndef FB_SEL
#define FB_SEL
#endif
#define CTRL1_SET_REG_FB_SEL                            (0x04)
#define CTRL1_SET_REG_FB_SEL_WTH                        (0x01)
#define CTRL1_SET_REG_FB_SEL_FLDSET                     (0x10)
#define CTRL1_SET_REG_FB_SEL_FLDMSK                     (0xEF)
#define CTRL1_SET_REG_FB_SEL_ACCESS                     RW

/**
TRICKLE_SET, RW, reset value(0x0)
Trickle charge phase threshold setting
0: 70% of VIN voltage setting (default)
1: 60% of VIN voltage setting
*/
#ifndef TRICKLE_SET
#define TRICKLE_SET
#endif
#define CTRL1_SET_REG_TRICKLE_SET                       (0x03)
#define CTRL1_SET_REG_TRICKLE_SET_WTH                   (0x01)
#define CTRL1_SET_REG_TRICKLE_SET_FLDSET                (0x08)
#define CTRL1_SET_REG_TRICKLE_SET_FLDMSK                (0xF7)
#define CTRL1_SET_REG_TRICKLE_SET_ACCESS                RW

/**
DIS_OVP, RW, reset value(0x0)
OVP protection setting for discharging mode
0: enable OVP protection (default)
1: disable OVP protection
*/
#ifndef DIS_OVP
#define DIS_OVP
#endif
#define CTRL1_SET_REG_DIS_OVP                           (0x02)
#define CTRL1_SET_REG_DIS_OVP_WTH                       (0x01)
#define CTRL1_SET_REG_DIS_OVP_FLDSET                    (0x04)
#define CTRL1_SET_REG_DIS_OVP_FLDMSK                    (0xFB)
#define CTRL1_SET_REG_DIS_OVP_ACCESS                    RW

#define CTRL1_SET_REG_ACCESS                            RW
#define CTRL1_SET_REG_FIELD_COUNT                       (8)


#define CTRL2_SET_REG                                   (0x0B)

/**
FACTORY, RW, reset value(0x0)
Factory setting bit. MCU shall write this bit to 1 after power up.
*/
#ifndef FACTORY
#define FACTORY
#endif
#define CTRL2_SET_REG_FACTORY                          (0x03)
#define CTRL2_SET_REG_FACTORY_WTH                      (0x01)
#define CTRL2_SET_REG_FACTORY_FLDSET                   (0x08)
#define CTRL2_SET_REG_FACTORY_FLDMSK                   (0xF7)
#define CTRL2_SET_REG_FACTORY_ACCESS                   RW

/**
SLEW_SET, RW, reset value(0x1)
Slew rate setting for VOUT dynamic change in discharging mode
00: 1mV/μs
01: 2mV/μs (default)
10: 4mV/μs
11: 8mV/μs
*/
#ifndef SLEW_SET
#define SLEW_SET
#endif
#define CTRL2_SET_REG_SLEW_SET                          (0x00)
#define CTRL2_SET_REG_SLEW_SET_WTH                      (0x02)
#define CTRL2_SET_REG_SLEW_SET_FLDSET                   (0x03)
#define CTRL2_SET_REG_SLEW_SET_FLDMSK                   (0xFC)
#define CTRL2_SET_REG_SLEW_SET_ACCESS                   RW

#define CTRL2_SET_REG_ACCESS                            RW
#define CTRL2_SET_REG_FIELD_COUNT                       (5)


#define CTRL3_SET_REG                                   (0x0C)

/**
EN_PGATE, RW, reset value(0x0)
PGATE control
0: PGATE outputs logic high to turn off PMOS (default)
1: PGATE outputs logic low to turn on PMOS
*/
#ifndef EN_PGATE
#define EN_PGATE
#endif
#define CTRL3_SET_REG_EN_PGATE                          (0x07)
#define CTRL3_SET_REG_EN_PGATE_WTH                      (0x01)
#define CTRL3_SET_REG_EN_PGATE_FLDSET                   (0x80)
#define CTRL3_SET_REG_EN_PGATE_FLDMSK                   (0x7F)
#define CTRL3_SET_REG_EN_PGATE_ACCESS                   RW

/**
GPO_CTRL, RW, reset value(0x0)
GPO output control
0: Open drain output (default)
1: Logic low output
*/
#ifndef GPO_CTRL
#define GPO_CTRL
#endif
#define CTRL3_SET_REG_GPO_CTRL                          (0x06)
#define CTRL3_SET_REG_GPO_CTRL_WTH                      (0x01)
#define CTRL3_SET_REG_GPO_CTRL_FLDSET                   (0x40)
#define CTRL3_SET_REG_GPO_CTRL_FLDMSK                   (0xBF)
#define CTRL3_SET_REG_GPO_CTRL_ACCESS                   RW

/**
AD_START, RW, reset value(0x0)
ADC control
0: stop ADC conversion (default)
1: start ADC conversion, MCU can read the voltage/current values from ADC registers
*/
#ifndef AD_START
#define AD_START
#endif
#define CTRL3_SET_REG_AD_START                          (0x05)
#define CTRL3_SET_REG_AD_START_WTH                      (0x01)
#define CTRL3_SET_REG_AD_START_FLDSET                   (0x20)
#define CTRL3_SET_REG_AD_START_FLDMSK                   (0xDF)
#define CTRL3_SET_REG_AD_START_ACCESS                   RW

/**
ILIM_BW_SEL, RW, reset value(0x0)
ILIM loop bandwidth setting:
0: 5kHz (default)
1: 1.25kHz
*/
#ifndef ILIM_BW_SEL
#define ILIM_BW_SEL
#endif
#define CTRL3_SET_REG_ILIM_BW_SEL                       (0x04)
#define CTRL3_SET_REG_ILIM_BW_SEL_WTH                   (0x01)
#define CTRL3_SET_REG_ILIM_BW_SEL_FLDSET                (0x10)
#define CTRL3_SET_REG_ILIM_BW_SEL_FLDMSK                (0xEF)
#define CTRL3_SET_REG_ILIM_BW_SEL_ACCESS                RW

/**
LOOP_SET, RW, reset value(0x0)
Loop response control
0: Normal loop response (default)
1: Improve the loop response
*/
#ifndef LOOP_SET
#define LOOP_SET
#endif
#define CTRL3_SET_REG_LOOP_SET                          (0x03)
#define CTRL3_SET_REG_LOOP_SET_WTH                      (0x01)
#define CTRL3_SET_REG_LOOP_SET_FLDSET                   (0x08)
#define CTRL3_SET_REG_LOOP_SET_FLDMSK                   (0xF7)
#define CTRL3_SET_REG_LOOP_SET_ACCESS                   RW

/**
DIS_SHORTFOLDBACK, RW, reset value(0x0)
IOUT current foldback control for VOUT short circuit condition, only valid in discharging mode
0: IOUT is fold-back to 1/10 of IOUT_LIM setting (default)
1: disable fold-back.
*/
#ifndef DIS_SHORTFOLDBACK
#define DIS_SHORTFOLDBACK
#endif
#define CTRL3_SET_REG_DIS_SHORTFOLDBACK                 (0x02)
#define CTRL3_SET_REG_DIS_SHORTFOLDBACK_WTH             (0x01)
#define CTRL3_SET_REG_DIS_SHORTFOLDBACK_FLDSET          (0x04)
#define CTRL3_SET_REG_DIS_SHORTFOLDBACK_FLDMSK          (0xFB)
#define CTRL3_SET_REG_DIS_SHORTFOLDBACK_ACCESS          RW

/**
EN_PFM, RW, reset value(0x0)
PFM control under light load condition, only for discharging mode
0: disable PFM mode (PWM mode enabled) (default)
1: enable PFM mode
*/
#ifndef EN_PFM
#define EN_PFM
#endif
#define CTRL3_SET_REG_EN_PFM                            (0x00)
#define CTRL3_SET_REG_EN_PFM_WTH                        (0x01)
#define CTRL3_SET_REG_EN_PFM_FLDSET                     (0x01)
#define CTRL3_SET_REG_EN_PFM_FLDMSK                     (0xFE)
#define CTRL3_SET_REG_EN_PFM_ACCESS                     RW

#define CTRL3_SET_REG_ACCESS                            RW
#define CTRL3_SET_REG_FIELD_COUNT                       (8)


#define VOUT_FB_VALUE_REG                               (0x0D)

/**
VOUT_FB_VALUE, RO, reset value(0x0)
The highest 8-bit of the ADC reading of VOUT voltage (total 10-bit).
VOUT voltage is calculated as
VOUT = (4 x VOUT_FB_VALUE + VOUT_FB_VALUE2 + 1) x VOUT_RATIO x 2 mV
VOUT_FB_VALUE range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
….
1111 1111: 255
*/
#ifndef VOUT_FB_VALUE
#define VOUT_FB_VALUE
#endif
#define VOUT_FB_VALUE_REG_VOUT_FB_VALUE                 (0x00)
#define VOUT_FB_VALUE_REG_VOUT_FB_VALUE_WTH             (0x08)
#define VOUT_FB_VALUE_REG_VOUT_FB_VALUE_FLDSET          (0xFF)
#define VOUT_FB_VALUE_REG_VOUT_FB_VALUE_FLDMSK          (0x00)
#define VOUT_FB_VALUE_REG_VOUT_FB_VALUE_ACCESS          RO

#define VOUT_FB_VALUE_REG_ACCESS                        RO
#define VOUT_FB_VALUE_REG_FIELD_COUNT                   (1)


#define VOUT_FB_VALUE2_REG                              (0x0E)

/**
VOUT_FB_VALUE2, RO, reset value(0x0)
The lowest 2-bit of the ADC reading of VOUT voltage (total 10-bit).
VOUT voltage is calculated as VOUT voltage is calculated as
VOUT = (4 x VOUT_FB_VALUE + VOUT_FB_VALUE2 + 1) x VOUT_RATIO x 2 mV
VOUT_FB_VALUE2 range: 0 ~ 3
00: 0
01: 1
10: 2
11: 3
*/
#ifndef VOUT_FB_VALUE2
#define VOUT_FB_VALUE2
#endif
#define VOUT_FB_VALUE2_REG_VOUT_FB_VALUE2               (0x06)
#define VOUT_FB_VALUE2_REG_VOUT_FB_VALUE2_WTH           (0x02)
#define VOUT_FB_VALUE2_REG_VOUT_FB_VALUE2_FLDSET        (0xC0)
#define VOUT_FB_VALUE2_REG_VOUT_FB_VALUE2_FLDMSK        (0x3F)
#define VOUT_FB_VALUE2_REG_VOUT_FB_VALUE2_ACCESS        RO

#define VOUT_FB_VALUE2_REG_ACCESS                       RO
#define VOUT_FB_VALUE2_REG_FIELD_COUNT                  (2)


#define VIN_FB_VALUE_REG                               (0x0F)

/**
VIN_VALUE, RO, reset value(0x0)
The highest 8-bit of the ADC reading of VIN voltage (total 10-bit).
VIN voltage is calculated as
VIN = (4 x VIN_FB_VALUE + VIN_FB_VALUE2 + 1) x VIN_MON_RATIO x 2 mV
VIN_FB_VALUE range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
….
1111 1111: 255
*/
#ifndef VIN_VALUE
#define VIN_VALUE
#endif
#define VIN_FB_VALUE_REG_VIN_VALUE                    (0x00)
#define VIN_FB_VALUE_REG_VIN_VALUE_WTH                (0x08)
#define VIN_FB_VALUE_REG_VIN_VALUE_FLDSET             (0xFF)
#define VIN_FB_VALUE_REG_VIN_VALUE_FLDMSK             (0x00)
#define VIN_FB_VALUE_REG_VIN_VALUE_ACCESS             RO

#define VIN_FB_VALUE_REG_ACCESS                        RO
#define VIN_FB_VALUE_REG_FIELD_COUNT                   (1)


#define VIN_FB_VALUE2_REG                              (0x10)

/**
VIN_FB_VALUE_2, RO, reset value(0x0)
The lowest 2-bit of the ADC reading of VIN voltage (total 10-bit).
VIN voltage is calculated as
VIN = (4 x VIN_FB_VALUE + VIN_FB_VALUE2 + 1) x VIN_MON_RATIO x 2 mV
VIN_FB_VALUE_2 range: 0 ~ 3
00: 0
01: 1
10: 2
11: 3
*/
#ifndef VIN_FB_VALUE_2
#define VIN_FB_VALUE_2
#endif
#define VIN_FB_VALUE2_REG_VIN_FB_VALUE_2              (0x06)
#define VIN_FB_VALUE2_REG_VIN_FB_VALUE_2_WTH          (0x02)
#define VIN_FB_VALUE2_REG_VIN_FB_VALUE_2_FLDSET       (0xC0)
#define VIN_FB_VALUE2_REG_VIN_FB_VALUE_2_FLDMSK       (0x3F)
#define VIN_FB_VALUE2_REG_VIN_FB_VALUE_2_ACCESS       RO

#define VIN_FB_VALUE2_REG_ACCESS                       RO
#define VIN_FB_VALUE2_REG_FIELD_COUNT                  (2)


#define IOUT_VALUE_REG                                  (0x11)

/**
IOUT_VALUE, RO, reset value(0x0)
The highest 8-bit of the ADC reading of IOUT current (total 10-bit).
IOUT current is calculated as IOUT (A) = (4 x IOUT_VALUE + IOUT_VALUE2 + 1)×21200 × IOUT_RATIO ×10 mΩRS1
IOUT_VALUE range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
….
1111 1111: 255
*/
#ifndef IOUT_VALUE
#define IOUT_VALUE
#endif
#define IOUT_VALUE_REG_IOUT_VALUE                       (0x00)
#define IOUT_VALUE_REG_IOUT_VALUE_WTH                   (0x08)
#define IOUT_VALUE_REG_IOUT_VALUE_FLDSET                (0xFF)
#define IOUT_VALUE_REG_IOUT_VALUE_FLDMSK                (0x00)
#define IOUT_VALUE_REG_IOUT_VALUE_ACCESS                RO

#define IOUT_VALUE_REG_ACCESS                           RO
#define IOUT_VALUE_REG_FIELD_COUNT                      (1)


#define IOUT_VALUE2_REG                                 (0x12)

/**
IOUT_VALUE2, RO, reset value(0x0)
The lowest 2-bit of the ADC reading of IOUT current (total 10-bit).
IOUT current is calculated as IOUT (A) = (4 x IOUT_VALUE + IOUT_VALUE2 + 1)×21200 × IOUT_RATIO ×10 mΩRS1
IOUT_VALUE2 range: 0 ~ 3
00: 0
01: 1
10: 2
11: 3
*/
#ifndef IOUT_VALUE2
#define IOUT_VALUE2
#endif
#define IOUT_VALUE2_REG_IOUT_VALUE2                     (0x06)
#define IOUT_VALUE2_REG_IOUT_VALUE2_WTH                 (0x02)
#define IOUT_VALUE2_REG_IOUT_VALUE2_FLDSET              (0xC0)
#define IOUT_VALUE2_REG_IOUT_VALUE2_FLDMSK              (0x3F)
#define IOUT_VALUE2_REG_IOUT_VALUE2_ACCESS              RO

#define IOUT_VALUE2_REG_ACCESS                          RO
#define IOUT_VALUE2_REG_FIELD_COUNT                     (2)


#define IIN_VALUE_REG                                  (0x13)

/**
IIN_VALUE, RO, reset value(0x0)
The highest 8-bit of the ADC reading of IIN current (total 10-bit).
IIN current is calculated as IIN (A) = (4 x IIN_VALUE + IIN_VALUE2 + 1)×21200 × IIN_RATIO ×10 mΩRS2
IIN_VALUE range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
….
1111 1111: 255
*/
#ifndef IIN_VALUE
#define IIN_VALUE
#endif
#define IIN_VALUE_REG_IIN_VALUE                       (0x00)
#define IIN_VALUE_REG_IIN_VALUE_WTH                   (0x08)
#define IIN_VALUE_REG_IIN_VALUE_FLDSET                (0xFF)
#define IIN_VALUE_REG_IIN_VALUE_FLDMSK                (0x00)
#define IIN_VALUE_REG_IIN_VALUE_ACCESS                RO

#define IIN_VALUE_REG_ACCESS                           RO
#define IIN_VALUE_REG_FIELD_COUNT                      (1)


#define IIN_VALUE2_REG                                 (0x14)

/**
IIN_VALUE2, RO, reset value(0x0)
The lowest 2-bit of the ADC reading of IIN current (total 10-bit).
IIN current is calculated as IIN (A) = (4 x IIN_VALUE + IIN_VALUE2 + 1)×21200 × IIN_RATIO ×10 mΩRS2
IIN_VALUE2 range: 0 ~ 3
00: 0
01: 1
10: 2
11: 3
*/
#ifndef IIN_VALUE2
#define IIN_VALUE2
#endif
#define IIN_VALUE2_REG_IIN_VALUE2                     (0x06)
#define IIN_VALUE2_REG_IIN_VALUE2_WTH                 (0x02)
#define IIN_VALUE2_REG_IIN_VALUE2_FLDSET              (0xC0)
#define IIN_VALUE2_REG_IIN_VALUE2_FLDMSK              (0x3F)
#define IIN_VALUE2_REG_IIN_VALUE2_ACCESS              RO

#define IIN_VALUE2_REG_ACCESS                          RO
#define IIN_VALUE2_REG_FIELD_COUNT                     (2)


#define ADIN_VALUE_REG                                  (0x15)

/**
ADIN_VALUE, RO, reset value(0x0)
The highest 8-bit of the ADC reading of ADIN voltage (total 10-bit).
ADIN voltage is calculated as
VADIN = (4 x ADIN_VALUE + ADIN_VALUE2 + 1) x 2 mV
ADIN_VALUE range: 0 ~ 255
0000 0000: 0
0000 0001: 1
0000 0010: 2
….
1111 1111: 255
*/
#ifndef ADIN_VALUE
#define ADIN_VALUE
#endif
#define ADIN_VALUE_REG_ADIN_VALUE                       (0x00)
#define ADIN_VALUE_REG_ADIN_VALUE_WTH                   (0x08)
#define ADIN_VALUE_REG_ADIN_VALUE_FLDSET                (0xFF)
#define ADIN_VALUE_REG_ADIN_VALUE_FLDMSK                (0x00)
#define ADIN_VALUE_REG_ADIN_VALUE_ACCESS                RO

#define ADIN_VALUE_REG_ACCESS                           RO
#define ADIN_VALUE_REG_FIELD_COUNT                      (1)


#define ADIN_VALUE_2_REG                                (0x16)

/**
ADIN_VALUE2, RO, reset value(0x0)
The lowest 2-bit of the ADC reading of ADIN voltage (total 10-bit).
ADIN voltage is calculated as
VADIN = (4 x ADIN_VALUE + ADIN_VALUE2 + 1) x 2 mV
ADIN_VALUE_2 range: 0 ~ 3
00: 0
01: 1
10: 2
11: 3
*/
#ifndef ADIN_VALUE2
#define ADIN_VALUE2
#endif
#define ADIN_VALUE_2_REG_ADIN_VALUE2                    (0x06)
#define ADIN_VALUE_2_REG_ADIN_VALUE2_WTH                (0x02)
#define ADIN_VALUE_2_REG_ADIN_VALUE2_FLDSET             (0xC0)
#define ADIN_VALUE_2_REG_ADIN_VALUE2_FLDMSK             (0x3F)
#define ADIN_VALUE_2_REG_ADIN_VALUE2_ACCESS             RO

#define ADIN_VALUE_2_REG_ACCESS                         RO
#define ADIN_VALUE_2_REG_FIELD_COUNT                    (2)


#define STATUS_REG                                      (0x17)


/**
INDET, RO, reset value(0x0)
if DIS_INDET = 0:
1: USB-A load insert is detected at INDET pin
if DIS_INDET = 1:
1: INDET pin voltage is higher than 1V (when PSTOP is low) or 0.7V (when PSTOP is high)
*/
#ifndef INDET
#define INDET
#endif
#define STATUS_REG_INDET                               (0x05)
#define STATUS_REG_INDET_WTH                           (0x01)
#define STATUS_REG_INDET_FLDSET                        (0x20)
#define STATUS_REG_INDET_FLDMSK                        (0xDF)
#define STATUS_REG_INDET_ACCESS                        RO

/**
VOUT_SHORT, RO, reset value(0x0)
1: VOUT short circuit fault happens in discharging mode
*/
#ifndef VOUT_SHORT
#define VOUT_SHORT
#endif
#define STATUS_REG_VOUT_SHORT                           (0x03)
#define STATUS_REG_VOUT_SHORT_WTH                       (0x01)
#define STATUS_REG_VOUT_SHORT_FLDSET                    (0x08)
#define STATUS_REG_VOUT_SHORT_FLDMSK                    (0xF7)
#define STATUS_REG_VOUT_SHORT_ACCESS                    RO

/**
OTP, RO, reset value(0x0)
1: OTP fault happens
*/
#ifndef OTP
#define OTP
#endif
#define STATUS_REG_OTP                                  (0x02)
#define STATUS_REG_OTP_WTH                              (0x01)
#define STATUS_REG_OTP_FLDSET                           (0x04)
#define STATUS_REG_OTP_FLDMSK                           (0xFB)
#define STATUS_REG_OTP_ACCESS                           RO

#define STATUS_REG_ACCESS                               RO
#define STATUS_REG_FIELD_COUNT                          (8)


#define MASK_REG                                        (0x19)

/**
INDET_MASK, RW, reset value(0x0)
1: Interrupt is disabled
*/
#ifndef INDET_MASK
#define INDET_MASK
#endif
#define MASK_REG_INDET_MASK                            (0x05)
#define MASK_REG_INDET_MASK_WTH                        (0x01)
#define MASK_REG_INDET_MASK_FLDSET                     (0x20)
#define MASK_REG_INDET_MASK_FLDMSK                     (0xDF)
#define MASK_REG_INDET_MASK_ACCESS                     RW

/**
VOUT_SHORT_MASK, RW, reset value(0x0)
1: Interrupt is disabled
*/
#ifndef VOUT_SHORT_MASK
#define VOUT_SHORT_MASK
#endif
#define MASK_REG_VOUT_SHORT_MASK                        (0x03)
#define MASK_REG_VOUT_SHORT_MASK_WTH                    (0x01)
#define MASK_REG_VOUT_SHORT_MASK_FLDSET                 (0x08)
#define MASK_REG_VOUT_SHORT_MASK_FLDMSK                 (0xF7)
#define MASK_REG_VOUT_SHORT_MASK_ACCESS                 RW

/**
OTP_MASK, RW, reset value(0x0)
1: Interrupt is disabled
*/
#ifndef OTP_MASK
#define OTP_MASK
#endif
#define MASK_REG_OTP_MASK                               (0x02)
#define MASK_REG_OTP_MASK_WTH                           (0x01)
#define MASK_REG_OTP_MASK_FLDSET                        (0x04)
#define MASK_REG_OTP_MASK_FLDMSK                        (0xFB)
#define MASK_REG_OTP_MASK_ACCESS                        RW


#define MASK_REG_ACCESS                                 RW
#define MASK_REG_FIELD_COUNT                            (8)



#endif /* #ifndef __SC8014_REG_DEFS_H_ */

