/***********************************************************************
 * Copyright (c)  2017 - 2023, Unicmicro Co.,Ltd .
 * All rights reserved.
 * Filename    : um16436_i2c.h
 * Description : um16436 i2c header file
 * Author(s)   : MCU Team
 * version     : V1.0
 * Modify date : 2023-06-13
 ***********************************************************************/

#ifndef __UM16436_I2C_H__
#define __UM16436_I2C_H__

#include "types.h"
#include "um_i2c.h"

//Slave Address
#define UMLCD_DEVICE_ADDR		(0x32)

#define	UMLCD_DISPCTRL_REG			(0x00)
	//DISPMD	
	#define UMLCD_DISPMD			(0)
    #define UMLCD_DISPMD_END		(0)
	#define UMLCD_DISPMD_NORMAL		(0x00 << 0)
	#define UMLCD_DISPMD_TEST		(0x01 << 0)
	//TEST	
	#define UMLCD_DISP_ALL			(1)
    #define UMLCD_DISP_ALL_END		(1)
	#define UMLCD_DISP_ALL_OFF		(0x00 << 1)
	#define UMLCD_DISP_ALL_ON		(0x01 << 1)
	//FLICK	
	#define UMLCD_FLICK				(2)
    #define UMLCD_FLICK_END			(2)
	#define UMLCD_FLICK_OFF			(0x00 << 2)
	#define UMLCD_FLICK_ON			(0x01 << 2)
	//FELUSE_EN	
	#define UMLCD_FELUSE_EN			(3)
    #define UMLCD_FELUSE_EN_END		(3)
	#define UMLCD_FELUSE_EN_OFF		(0x00 << 3)
	#define UMLCD_FELUSE_EN_ON		(0x01 << 3)	
	//PWEN	
	#define UMLCD_PWEN				(4)
    #define UMLCD_PWEN_END			(4)
	#define UMLCD_PWEN_OFF			(0x00 << 4)
	#define UMLCD_PWEN_ON			(0x01 << 4)	
	//LCD_EN	
	#define UMLCD_LCD_EN			(6)
    #define UMLCD_LCD_EN_END		(6)
	#define UMLCD_LCD_EN_OFF		(0x00 << 6)
	#define UMLCD_LCD_EN_ON			(0x01 << 6)
	
#define UMLCD_TEST_REG				(0x01)
	//TESTEN	
	#define UMLCD_TESTEN			(0)
    #define UMLCD_TESTEN_END		(0)
	#define UMLCD_TESTEN_OFF		(0x00 << 0)
	#define UMLCD_TESTEN_ON			(0x01 << 0)
	//RCL_CAT_EN
	#define UMLCD_RCL_CAT_EN		(1)
    #define UMLCD_RCL_CAT_EN_END	(1)	
	#define UMLCD_RCL_CAT_EN_OFF	(0x00 << 1)
	#define UMLCD_RCL_CAT_EN_ON		(0x01 << 1)		
	//VLCD_SET
	#define UMLCD_VLCD_SET			(2)
    #define UMLCD_VLCD_SET_END		(5)	
	#define UMLCD_VLCD_SET_VDD		(0x00 << 2)
	#define UMLCD_VLCD_SET_0P95VDD	(0x01 << 2)	
	#define UMLCD_VLCD_SET_0P9VDD	(0x02 << 2)	
	#define UMLCD_VLCD_SET_0P85VDD	(0x03 << 2)	
	#define UMLCD_VLCD_SET_0P8VDD	(0x04 << 2)	
	#define UMLCD_VLCD_SET_0P75VDD	(0x05 << 2)	
	#define UMLCD_VLCD_SET_0P7VDD	(0x06 << 2)	
	#define UMLCD_VLCD_SET_0P65VDD	(0x07 << 2)	
	#define UMLCD_VLCD_SET_0P6VDD	(0x08 << 2)	
	#define UMLCD_VLCD_SET_0P55VDD	(0x09 << 2)	
	#define UMLCD_VLCD_SET_0P5VDD	(0x0A << 2)	
	#define UMLCD_VLCD_SET_0P45VDD	(0x0B << 2)	
	#define UMLCD_VLCD_SET_VLCD		(0x0C << 2)	
	//LCCTRL
	#define UMLCD_LCCTRL			(7)
    #define UMLCD_LCCTRL_END		(7)
	#define UMLCD_LCCTRL_OFF		(0x00 << 7)
	#define UMLCD_LCCTRL_ON			(0x01 << 7)
	
#define UMLCD_DFSET_REG				(0x03)
	//DFSET	
	#define UMLCD_DFSET				(0)
    #define UMLCD_DFSET_END			(1)
	#define UMLCD_DFSET_TYPE_A_32Hz	(0x00 << 0)
	#define UMLCD_DFSET_TYPE_A_48Hz	(0x01 << 0)	
	#define UMLCD_DFSET_TYPE_A_64Hz	(0x02 << 0)
	#define UMLCD_DFSET_TYPE_A_80Hz	(0x03 << 0)		
	#define UMLCD_DFSET_TYPE_B_16Hz	(0x00 << 0)
	#define UMLCD_DFSET_TYPE_B_24Hz	(0x01 << 0)	
	#define UMLCD_DFSET_TYPE_B_64Hz	(0x02 << 0)
	#define UMLCD_DFSET_TYPE_B_80Hz	(0x03 << 0)			
	//DFSET_EN
	#define UMLCD_DFSET_EN			(2)
    #define UMLCD_DFSET_EN_END		(2)
	#define UMLCD_DFSET_EN_OFF		(0x00 << 2)
	#define UMLCD_DFSET_EN_ON		(0x01 << 2)
		
#define UMLCD_TON_REG				(0x04)

#define UMLCD_TOFF_REG				(0x05)
	
#define UMLCD_LCDSET_REG			(0x06)
	//DISPLAY_MODE
	#define UMLCD_DISPLAY_MODE		(0)
    #define UMLCD_DISPLAY_MODE_END	(1)
	#define UMLCD_DISPLAY_MODE_36x4	(0x00 << 0)
	#define UMLCD_DISPLAY_MODE_34x6	(0x01 << 0)
	#define UMLCD_DISPLAY_MODE_32x8	(0x02 << 0)
	//INV_MODE
	#define UMLCD_INV_MODE			(2)
    #define UMLCD_INV_MODE_END		(2)
	#define UMLCD_INV_MODE_TYPE_A	(0x00 << 2)
	#define UMLCD_INV_MODE_TYPE_B	(0x01 << 2)
	//BIAS_SET	
	#define UMLCD_BIAS_SET			(4)
    #define UMLCD_BIAS_SET_END		(5)
	#define UMLCD_BIAS_SET_ONE_SECOND	(0x00 << 4)
	#define UMLCD_BIAS_SET_ONE_THIRD	(0x01 << 4)
	#define UMLCD_BIAS_SET_ONE_FOURTH	(0x02 << 4)
	//IBIAS_SET
	#define UMLCD_IBIAS_SET			(6)
    #define UMLCD_IBIAS_SET_END		(7)
	#define UMLCD_IBIAS_SET_100nA	(0x00 << 6)
	#define UMLCD_IBIAS_SET_200nA	(0x01 << 6)
	#define UMLCD_IBIAS_SET_300nA	(0x02 << 6)
	#define UMLCD_IBIAS_SET_400nA	(0x03 << 6)

#define UMLCD_FCSET_REG				(0x07)
	//FC_PW
	#define UMLCD_FC_PW				(0)
    #define UMLCD_FC_PW_END			(3)
	#define UMLCD_FC_PW_CLOCK_1		(0x00 << 0)
	#define UMLCD_FC_PW_CLOCK_2		(0x01 << 0)
	#define UMLCD_FC_PW_CLOCK_3		(0x02 << 0)
	#define UMLCD_FC_PW_CLOCK_4		(0x03 << 0)
	#define UMLCD_FC_PW_CLOCK_5		(0x04 << 0)
	#define UMLCD_FC_PW_CLOCK_6		(0x05 << 0)
	#define UMLCD_FC_PW_CLOCK_7		(0x06 << 0)
	#define UMLCD_FC_PW_CLOCK_8		(0x07 << 0)
	#define UMLCD_FC_PW_CLOCK_9		(0x08 << 0)
	#define UMLCD_FC_PW_CLOCK_10	(0x09 << 0)
	#define UMLCD_FC_PW_CLOCK_11	(0x0A << 0)
	#define UMLCD_FC_PW_CLOCK_12	(0x0B << 0)
	#define UMLCD_FC_PW_CLOCK_13	(0x0C << 0)
	#define UMLCD_FC_PW_CLOCK_14	(0x0D << 0)
	#define UMLCD_FC_PW_CLOCK_15	(0x0E << 0)
	#define UMLCD_FC_PW_CLOCK_16	(0x0F << 0)
	//FC_DS
	#define UMLCD_FC_DS				(4)
    #define UMLCD_FC_DS_END			(7)
	#define UMLCD_FC_DS_10UA		(0x00 << 4)
	#define UMLCD_FC_DS_20UA		(0x01 << 4)
	#define UMLCD_FC_DS_30UA		(0x02 << 4)
	#define UMLCD_FC_DS_40UA		(0x03 << 4)
	#define UMLCD_FC_DS_50UA		(0x04 << 4)
	#define UMLCD_FC_DS_60UA		(0x05 << 4)
	#define UMLCD_FC_DS_70UA		(0x06 << 4)
	#define UMLCD_FC_DS_80UA		(0x07 << 4)
	#define UMLCD_FC_DS_90UA		(0x08 << 4)
	#define UMLCD_FC_DS_100UA		(0x09 << 4)
	#define UMLCD_FC_DS_110UA		(0x0A << 4)
	#define UMLCD_FC_DS_120UA		(0x0B << 4)
	#define UMLCD_FC_DS_130UA		(0x0C << 4)
	#define UMLCD_FC_DS_140UA		(0x0D << 4)
	#define UMLCD_FC_DS_150UA		(0x0E << 4)
	#define UMLCD_FC_DS_160UA		(0x0F << 4)
		
#define UMLCD_COM0_DATA0_REG		(0x08)
#define UMLCD_COM0_DATA1_REG		(0x09)
#define UMLCD_COM0_DATA2_REG		(0x0A)
#define UMLCD_COM0_DATA3_REG		(0x0B)
#define UMLCD_COM0_DATA4_REG		(0x0C)

#define UMLCD_COM1_DATA5_REG		(0x0D)
#define UMLCD_COM1_DATA6_REG		(0x0E)
#define UMLCD_COM1_DATA7_REG		(0x0F)
#define UMLCD_COM1_DATA8_REG		(0x10)
#define UMLCD_COM1_DATA9_REG		(0x11)

#define UMLCD_COM2_DATA10_REG		(0x12)
#define UMLCD_COM2_DATA11_REG		(0x13)
#define UMLCD_COM2_DATA12_REG		(0x14)
#define UMLCD_COM2_DATA13_REG		(0x15)
#define UMLCD_COM2_DATA14_REG		(0x16)

#define UMLCD_COM3_DATA15_REG		(0x17)
#define UMLCD_COM3_DATA16_REG		(0x18)
#define UMLCD_COM3_DATA17_REG		(0x19)
#define UMLCD_COM3_DATA18_REG		(0x1A)
#define UMLCD_COM3_DATA19_REG		(0x1B)

#define UMLCD_COM4_DATA20_REG		(0x1C)
#define UMLCD_COM4_DATA21_REG		(0x1D)
#define UMLCD_COM4_DATA22_REG		(0x1E)
#define UMLCD_COM4_DATA23_REG		(0x1F)
#define UMLCD_COM4_DATA24_REG		(0x20)

#define UMLCD_COM5_DATA25_REG		(0x21)
#define UMLCD_COM5_DATA26_REG		(0x22)
#define UMLCD_COM5_DATA27_REG		(0x23)
#define UMLCD_COM5_DATA28_REG		(0x24)
#define UMLCD_COM5_DATA29_REG		(0x25)

#define UMLCD_COM6_DATA30_REG		(0x26)
#define UMLCD_COM6_DATA31_REG		(0x27)
#define UMLCD_COM6_DATA32_REG		(0x28)
#define UMLCD_COM6_DATA33_REG		(0x29)

#define UMLCD_COM7_DATA34_REG		(0x2A)
#define UMLCD_COM7_DATA35_REG		(0x2B)
#define UMLCD_COM7_DATA36_REG		(0x2C)
#define UMLCD_COM7_DATA37_REG		(0x2D)
	
#define UMLCD_SYS_CTRL_REG			(0x31)
	//CLK_SEL
	#define UMLCD_CLK_SEL			(0)
    #define UMLCD_CLK_SEL_END		(0)
	#define UMLCD_CLK_SEL_INTERNAL	(0x00 << 0)
	#define UMLCD_CLK_SEL_EXTERNAL	(0x01 << 0)
	//SPI_LOCK
	#define UMLCD_SPI_LOCK			(1)
    #define UMLCD_SPI_LOCK_END		(1)
	#define UMLCD_SPI_LOCK_OFF		(0x00 << 1)
	#define UMLCD_SPI_LOCK_ON		(0x01 << 1)
	//I2C_LOCK	
	#define UMLCD_I2C_LOCK			(2)
    #define UMLCD_I2C_LOCK_END		(2)
	#define UMLCD_I2C_LOCK_OFF		(0x00 << 2)
	#define UMLCD_I2C_LOCK_ON		(0x01 << 2)
	//CLK32K_EN	
	#define UMLCD_CLK32K_EN			(3)
    #define UMLCD_CLK32K_EN_END		(3)
	#define UMLCD_CLK32K_EN_OFF		(0x00 << 3)
	#define UMLCD_CLK32K_EN_ON		(0x01 << 3)
	//WDT_EN	
	#define UMLCD_WDT_EN			(4)
    #define UMLCD_WDT_EN_END		(4)
	#define UMLCD_WDT_EN_OFF		(0x00 << 4)
	#define UMLCD_WDT_EN_ON			(0x01 << 4)
	//CLK_OUT
	#define UMLCD_CLK_OUT			(5)
    #define UMLCD_CLK_OUT_END		(5)
	#define UMLCD_CLK_OUT_OFF		(0x00 << 5)
	#define UMLCD_CLK_OUT_ON		(0x01 << 5)
	
#define UMLCD_WDT_VAL_REG			(0x32)
#define UMLCD_WDT_STA_REG			(0x33)	

/************************************************************************
 * function   : umlcd_clear_display
 * Description: umlcd_clear_display全屏清空显示
 * input : none
 * return: none
 ************************************************************************/
void umlcd_clear_display(void);

/************************************************************************
 * function   : umlcd_all_display
 * Description: umlcd_all_display全屏显示
 * input : none
 * return: none
 ************************************************************************/
void umlcd_all_display(void);

/************************************************************************
 * function   : umlcd_display
 * Description: umlcd_display用于控制单个段码的显示
 * input : 
 *			char *display_table		：显示段码的字符数组
 *			uint8_t length			：显示段码的个数
 * return: none
 ************************************************************************/
void umlcd_display(char *display_table, uint8_t length);

/************************************************************************
 * function   : umlcd_num_display
 * Description: umlcd_num_display段码数字显示0-9
 * input : 
 *			uint8_t num_location：第几个段码
 *			uint8_t num			：需要显示的数字
 * return: none
 ************************************************************************/
void umlcd_num_display(uint8_t num_location, uint8_t num);

#endif /* __UM16436_I2C_H__ */

