The new battery pack integrated with Type-C interface supports bidirectional high-power charging and discharging on a single TYPE-C interface. QC2.0/3.0 protocol is optional and the maximum input/output is 100 W (5 A E-Mark cable required). As a SoC controller chip, UM3506 is responsible for implementing board-level system policy/status control and indication for the main control of the mobile power supply. Combined with the bidirectional BUCK-BOOST power supply IC, the chip can access and control the external power supply IC via the standard I2C digital serial interface / PWM interface to enable charging-discharging / boost-buck / power system setting, etc. The solution can be easily integrated on the BMS board.

PD/Type-C DRP bidirectional solution, one Type-C

Supporting 3–6 strings of battery

Type-C port output: 5/9/12/15 V @ 3 A, 20 V/5 A MAX (E-Mark 5 A cable required)

Type-C port input: arbitrary input, up to 20 V/5 A (customizable within 60–100 W as required)

USB A port power output optional

Hardware-level secondary protection available, BMS primary protection optional

UM3506 implements PD DRP protocol, power management, BMS, and communication with electric tools to ensure the safety of charging and discharging.

As a more advanced physical interface, USB Type-C can provide a variety of control and transmission channels under full-featured full PIN (24PIN). With the cooperation of PD protocol, power negotiation and interface working mode negotiation can be carried out, thus enabling the corresponding channel functions. The Type-C DP ALT mode is accomplished through the negotiation process of USB PD protocol, which uses the protocol interaction of VDM in PD protocol to allow connected devices to access data transfer functions such as DP.

UM3506 series of Unicmicro is a USB PD/Type-C interface controller chip that supports the latest USB PD3.1 protocol and DP ALT mode, making it ideal for versatile Type-C interface solutions such as notebooks, docking stations, AR/VR devices, displays, etc. Adopting flexible and programmable architecture combining software and hardware and an internal TCPM/TCPC layered architecture, UM3506 integrates a native TCPC-like front-end module, high-performance 32-bit RISC-V core, large-capacity Flash memory, SRAM memory, enhanced peripheral interfaces and rich system resources, greatly facilitating the secondary development by customers.

UM3506-based DP ALT system solution specification:

USB C1 reverse charging port

PD3.0/3.1 140W SINK

I2C communication

USB C2 supporting full-featured interface

PD source 65W

DP SINK (RX)

2-/4-lane DP transmission mode, 8-K HDR video transmission

AUX 1/2

HPD detection

DP native interface

Software platform configuration in UM3506 system solution:

FreeeRTOS embedded open source operating system

Full-featured PD library

Open-source DP ALT protocol library

Flexible and easy-to-use CLI user interface

Eclipse-based IDE

In this reference solution, UM3506 PD+ SoC controller chip with RISC-V core is used to realize PD3.1 protocol interaction, bidirectional BUCK-BOOST power chip management, system control, etc.

Adopting flexible and programmable architecture combining software and hardware, UM3506 integrates an internal TCPM/TCPC layered architecture, a native TCPC-like front-end module including digital logic and analog circuits for Type-C interface detection and control, the packet BMC codec in PD PHY layer and key functions with strict timing requirements in PD protocol layer. It is also provided with high-performance 32-bit RISC-V microprocessor core, large-capacity Flash memory, SRAM memory, enhanced peripheral interfaces and rich system resources.

6–7 strings of battery cells

PD3.1 140-W DRP

Full-stack PD DRP protocol

5/9/15/20V@5A, 28V@5A

Supporting SPR PPS, EPR AVS

Flexible VDM message expansion capability

Complete charging and discharging power strategy of the system

Supporting power statistics

Optional system status displays (indicator display, LCD screen display, etc.)

Online upgrade available for UM3506 master

TYPE-C port expansion for TCPM + TCPC architecture